Memory consistency models (MCM) specify the order in which memory accesses performed by one processor become visible to other processors. Sequential Consistency (SC) is a strong and intuitive memory model that requires the memory accesses of a program appear to have been executed in a global sequential order consistent with the per-processor program order. We use atomic block as a key structure to support SC from application to architecture. An atomic block is a contiguous of instructions that are executed atomically and in isolation. It can be used as a mechanism to implement SC in architecture and as an interface that the software/compiler can use to demarcate the transformed codes that need to be executed atomically, making sure that SC is not violated by the software/compiler. We proposed several coherence protocols [ScalableBulk (MICRO'10)][BulkCommit (MICRO'13)][OmniOrder (ISCA'14)][BulkSMT (HPCA'12)] designed for continuous atomic block execution. For relaxed MCM, we proposed the architectural debugging supports [Volition (ASPLOS'13)][Rainbow (HPCA'13)][Pacifier (ISCA'14)] that detect SCVs and record data races for deterministic record and replay.
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A Comprehensive Evaluation of RDMA-enabled Concurrency Control Protocols
Chao Wang, Kezhao Huang, Xuehai Qian
arXiv 2002.12664, 2020
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TUPIM: A Transparent and Universal Processing-in-memory Architecture for Unmodified Binaries
Sheng Xu, Xiaoming Chen, Yinhe Han, Xuehai Qian, Xiaowei Li
GLSVLSI'20 The 30th edition of the ACM Great Lakes Symposium on VLSI, 2020
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SpeedyBox: Low-Latency NFV Service Chains with Cross-NF Runtime Consolidation
Yimin Jiang, Yong Cui, Wenfei Wu, Zhe Xu, Jiahan Gu, K. K. Ramakrishnan, Yongchao He, Xuehai Qian
ICDCS'19 The 39th IEEE International Conference on Distributed Computing Systems, 2019
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SW-Lock: A Fast Lock for Sunway Taihulight
Xiongchao Tang, Jidong Zhai, Xuehai Qian, Wenguang Chen
ASPLOS '19 The 24th International Conference
on Architectural Support for Programming Languages and Operating
Systems, 2019
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PIMSim: A Flexible and Detailed Processing-in-Memory Simulator
Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xuehai Qian, Xiaowei Li
CAL'19 Computer Architecture Letters, 2019
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CSE: Parallel Finite State Machines with Convergence Set Enumeration
Youwei Zhuo, Jinglei Cheng, Qinyi Luo, Jidong Zhai, Yanzhi Wang, Zhongzhi Luan, Xuehai Qian
MICRO'18 The 51st IEEE/ACM International Symposium on Microarchitecture
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vSensor: Leveraging Fixed-Workload Modules of Programs for Performance Variance Detection
Xiongchao Tang, Jidong Zhai, Xuehai Qian, Bingsheng He, Wei Xue, Wenguang Chen
PPOPP'18 The 23rd ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, 2018
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SReplay: Deterministic Group Replay for One-Sided Communication
Xuehai Qian, Koushik Sen, Paul Hargrove and Costin Iancu
ICS'16 The 2016 International Conference on
Supercomputing, 2016
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Pacifier: Record and Replay for Relaxed-Consistency
Multiprocessors with Distributed Directory Protocol
Xuehai Qian, Benjamin Sahelices and Depei
Qian
ISCA'14 The 41st International Symposium on
Computer Architecture, 2014
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OmniOrder: Directory-Based Conflict Serialization of Transactions
Xuehai Qian, Benjamin Sahelices and Josep Torrellas
ISCA'14 The 41st International Symposium on
Computer Architecture, 2014
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Volition: Precise and Scalable Sequential Consistency Violation Detection
Xuehai Qian, Benjamin Sahelices, Josep Torrellas and
Depei Qian
ASPLOS '13 The 18th International Conference
on Architectural Support for Programming Languages and Operating
Systems, 2013
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Rainbow: Efficient Memory Race Recording with High Replay
Parallelism for Relaxed Memory Model
Xuehai Qian, He Huang, Benjamin Sahelices and Depei Qian
HPCA'13 The 19th IEEE International
Symposium on High Performance Computer Architecture, 2013
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BulkCommit: Scalable and Fast Commit of Atomic Blocks in a Lazy
Multiprocessor Environment
Xuehai Qian, Benjamin Sahelices, Josep Torrellas and Depei
Qian
MICRO'13 The 46th Annual IEEE/ACM
International Symposium on Microarchitecture, 2013
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BulkSMT: Designing SMT Processors for Atomic-Block Execution
Xuehai Qian, Benjamin Sahelices and Josep Torrellas
HPCA'12 The 18th IEEE International
Symposium on High Performance Computer Architecture, 2012
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ScalableBulk: Scalable Cache Coherence for Atomic
Blocks in a Lazy Environment
Xuehai Qian, Wonsun Ahn and Josep Torrellas
MICRO'10 The 43th Annual IEEE/ACM
International Symposium on Microarchitecture, 2010